1. Field of the Invention
The present invention is a method of bonding and a bonding apparatus for a semiconductor chip that places electrode terminals of a semiconductor chip and electrode terminals of a substrate in contact with each other and applies ultrasonic vibration to the semiconductor chip to bond the electrode terminals of the semiconductor chip and the substrate together.
2. Description of the Related Art
In recent years, when flip-chip bonding a semiconductor chip to a circuit board during the manufacturing of a semiconductor device such as a semiconductor package, a method is used where electrode terminals such as bumps of the semiconductor chip are placed in contact with electrode terminals such as pads of the circuit board and ultrasonic vibration is applied to the semiconductor chip to bond the electrode terminals of the semiconductor chip and the printed circuit board together.
A conventional method of flip-chip bonding that uses ultrasonic vibration is disclosed in Patent Document 1.
In the method of flip-chip bonding disclosed in Patent Document 1, bumps of a flip chip (semiconductor chip) that is held on a mount head by suction are placed in contact with connection terminals of a substrate, a load is applied, and an ultrasonic vibrator incorporated in the mount head is caused to ultrasonically vibrate so that the flip chip is ultrasonically vibrated via the mount head (see Paragraphs 0016 to 0018 and FIGS. 1 and 2 of Patent Document 1)
By doing so, an oxide layer or the like on the connected parts can be removed easily, and highly reliable electrical connections can be produced (see Paragraph 0022 of Patent Document 1).
Conventional examples of a method of bonding and a bonding apparatus for a semiconductor chip that use ultrasonic vibration will now be described with reference to FIG. 6.
In FIG. 6, a circuit board 4 is held on a stage 2. A semiconductor chip 6 is held on a bonding tool 8 (mount head) and is moved together with the bonding tool 8 to carry out positioning so that bumps 6a, 6a, . . . provided on the semiconductor chip 6 are respectively placed in contact with corresponding pads 4a, 4a, . . . provided on the circuit board 4. Both end surfaces of the bonding tool 8 are connected to an ultrasonic vibrator 9, and by ultrasonically vibrating the ultrasonic vibrator 9 in a horizontal direction using a vibration control apparatus (not shown), the bonding tool 8 and the semiconductor chip 6 are both ultrasonically vibrated.
By doing so, ultrasonic vibration is transmitted to the bonding tool 8 as compressional waves. These compressional waves inevitably have maximum amplitude points (points where the amount of displacement in the compressional wave direction is greatest) at both ends of the contact body 8 that are connected to the ultrasonic vibrator 9. To effectively apply physical vibrations to the semiconductor chip 6, the semiconductor chip 6 is disposed in the vicinity of a maximum amplitude point of the compressional waves. In the example shown in FIG. 6, the semiconductor chip 6 is disposed in the vicinity of a maximum amplitude point of the compressional waves by setting the wavelength of the compressional waves equal to the length of the bonding tool 8 in the compressional wave direction and holding the semiconductor chip 6 at a position in a central part of the bonding tool 8.
Patent Document 1
Japanese Laid-Open Patent Publication No. H10–12669 (See Paragraphs 0016–0018 and 0022, and FIGS. 1 and 2).
However, in the conventional method of bonding a semiconductor chip that uses ultrasonic vibration, there is the problem that when the bonding characteristics of the electrode terminals (such as bumps and pads) of a semiconductor chip and a substrate are not sufficient, defects are caused in a semiconductor device.